ChipCraftModel-1
From intent.
To something you can test.
Describe it. CCM-1 can build the RTL,
test it, and use the results to refine it.
Turn the idea into a design.
Four spaces. Data leaves in the order it arrived.
More than generate. The whole RTL job.
Generating a module was never the hard part. CCM-1 drafts to the interface you already have, builds in steps, gets it past simulation, and wires it into a chip that boots.
One system carries the work past the first answer — the part that usually stops everyone else.
That FAIL is the point. Everything else would have handed you the error and stopped.
Built for hardware, and only hardware.
Your design stays yours
Runs on ChipCraftX infrastructure. An unreleased architecture never goes to a third-party model provider.
Trained on verified workflows
Not just RTL — the whole workflow of building, simulating, and repairing it, filtered by real EDA tools. A capable model that brings general reasoning to hardware, on data nobody else has.
$0.10 / $0.50 per 1M
A twentieth of Sonnet 5, a hundredth of a frontier model. Long context is never surcharged.
Early Access
Going out to design teams first. Request access and bring it your hardest module.
Beating Sonnet 5 at a twentieth of the cost
And a hundredth of what a frontier model charges. Specialisation is what buys that: a model that only has to be excellent at hardware does not need to pay for everything else.
Cost is list price per million tokens, input and output blended, indexed so Claude Fable 5 = 1.00. Renoir is plotted at the position its own vendor publishes, and does not list a per-token rate. The performance axis shows relative positioning for RTL work rather than a published benchmark score.
A twentieth of Sonnet 5. A hundredth of the frontier.
| Model | Input | Output | Relative cost |
|---|---|---|---|
| CCM-1Ours | $0.10 | $0.50 | 1% |
| Claude Sonnet 5 | $2.00 | $10.00 | 20% |
| Claude Opus 5 | $5.00 | $25.00 | 50% |
| Claude Fable 5 | $10.00 | $50.00 | 100% |
List price per million tokens. Long context is not surcharged, and there is no premium tier for the same model.
Your unreleased design stays yours
An unannounced architecture is the most sensitive thing a hardware team owns, and sending it to a general-purpose API means handing it to someone whose terms you do not control. CCM-1 is deployed on ChipCraftX infrastructure precisely so that never has to happen.
No third party in the path
Generation runs on ChipCraftX infrastructure. Your spec is never passed to an outside model provider, and if we cannot serve a request you get a clear error rather than a silent handoff to someone else.
Never used for training
Your specs and your RTL are never used to train or improve our models. Not by default, not quietly, and not without separate written consent from you.
Transient by default
Specs and generated RTL are held for the generation and a short debug window, then purged. What we keep afterwards is billing metadata, not your design.
Named access only
Access to anything you submit is restricted to named ChipCraftX operators under your agreement with us. It is never shared outside that.
One system. From the idea to the next checked revision.
Try ChipCraftSim ↗About this example and its checks +
The FIFO’s first version blocks a new write even when a simultaneous read frees a space. The revision accepts that write. Both illustrations represent the captured behavior at the same boundary.
The brief, RTL, testbench, and repair were authored for this demonstration. Results come from recorded calls to the harness’s Icarus and Yosys tools. This illustrates generation and repair; it is not a recorded autonomous CCM-1 session.
Both versions use the same testbench over 144 cycles. The revised RTL also completes synthesis. Passing this fixture establishes the behavior it exercises. Numbered blocks 1–5 stand for the captured words 0x11, 0x22, 0x33, 0x44, and 0xA5.